Engineering Lead/VP Engineering/CTO Freelance
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Seasoned engineering lead.
Experience in a multitude of domains such as VHDL/SystemVerilog language tooling, event processing, distributed storage & backup, video coding, etc. Combines deep hands-on, technical knowledge with a track record of leading teams that deliver industrial-grade software. Following my PhD, I spent a career in start-ups/scale-ups and love building things together with talented and motivated colleagues.
Founder at Belsimple (2026-04 – Present)
Solo-build of a SaaS application (belsimple.be) for tracking R&D time under the Belgian Belspo tax-exemption scheme. Seeking the limits of agentic coding.
VP Operations, Freelance at Sigasi (2018-09 – 2026-05)
Leading a 10-person international engineering team building an IDE for digital chip design (VHDL, SystemVerilog).
Senior Developer at NGData (2016-03 – 2018-08)
Customer data platform processing events originating from millions of customer profiles using large-scale ETL pipelines.
Consultant Developer at Amplidata (HGST/Western Digital) (2012-02 – 2016-01)
Petabyte-scale, erasure-coded object storage, distributing coded data across thousands of disks in multiple data centers.
Expert Research Engineer at Sigasi (2010-08 – 2012-01)
Reimplemented the IDE core on top of Xtext, a framework for programming languages and DSLs.
Principal Software Engineer at Symantec (2007-01 – 2010-06)
Enterprise backup product (PureDisk) with deduplication, storing all backup data on disk.
Post-Doctoral Researcher at Ghent University (2003-01 – 2006-12)
PhD in Applied Sciences, Computer Science – Ghent University (1997-09 – 2002-12)
Master in Computer Science, Computer Architecture – Ghent University (1992-09 – 1997-12)