Memory Sub-System Validation Lead - Data Center GPU
Job description
Job Description:WHAT YOU DO AT AMD CHANGES EVERYTHINGAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture.
We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.THE ROLE:The Datacenter Graphics and Accelerated Computing Validation Team seeks a proactive lead for our post-silicon validation group.
The Memory sub-system validation lead oversees pre- and post-silicon validation and characterization of High-Bandwidth Memory (HBM) in AMD’s Datacenter GPU and large-scale systems. This role connects DRAM architecture, memory controller design, PHY, product engineering, and software teams to ensure advanced memory technologies meet AMD’s quality standards from design through production. The team values innovation and supports ongoing professional growth.THE PERSON:A self-starter capable of executing complex test plans, collaborating with cross-functional teams, and resolving issues independently.
Expected to lead by example, mentor junior engineers, and work hands-on in the lab.KEY RESPONSIBILITIES:The Memory Sub-System Validation Lead is responsible for overseeing planning, execution, and debugging across all stages of pre- and post-silicon validation. This role involves creating and carrying out test plans for HBM functional and electrical validation, including PVT Shmoo characterization. The ideal candidate should have deep expertise in high-bandwidth memory subsystems, covering SoC memory architecture, unified memory controllers, PHY design, high-speed IO interfaces, DRAM devices, as well as related calibration and training methods.PREFERRED EXPERIENCE:Extensive experience in SoC validation, verification, and debugging of High-Bandwidth Memory subsystemsLead functional and electrical validation plans development for memory features with cross-functional teamsLead post-silicon debug, identify root causes, and guide corrective actions by partnering with stakeholdersCollaborate on memory-related silicon issues with Design, Verification, Silicon Validation, Manufacturing teamsProficient with industry-standard tools: JTAG, I2C, Testers, and lab equipmentStrong programming skills (C/C++, Python) on Linux and Windows platformsEffective team player, skilled at multitasking in fast-paced environmentsACADEMIC CREDENTIALS:
- Bachelors or Masters in Electrical or Computer Engineering
AMD’s “Responsible AI Policy” is availableThis posting is for an existing vacancy.
Advanced Micro Devices
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