Digital Signal Processing (DSP) Engineer

pbLocation: /b Neuchâtel, Switzerland /pppbOur Team: /b /p /ppSemtech Corporation is a leading supplier of analog and mixed-signal semiconductors serving high-end consumer, enterprise computing, communications, and industrial markets. As our future market opportunities continue to expand, we are investing heavily in disruptive analog platforms and breakthrough system-level innovation. /ppOur Wireless Analog/Digital and LoRa® System teams in Neuchâtel and Grenoble bring world-class expertise in Low Power Wide Area Network (LPWAN) solutions. We are global pioneers in long-range, ultra-low-power, battery-operated wireless communication — spanning antenna design, IC analog and digital architecture, low-power systems, protocol development, and cloud-connected solutions. /ppYou will be part of the journey shaping the next-generation LoRa® and LoRaWAN® system architecture — driving innovation that enables billions of connected devices worldwide. /pppbJob Summary: /b /p /ppWe are seeking a highly skilled bStaff Digital Design Engineer /b with deep expertise in Digital Signal Processing (DSP) for wireless communication systems. /ppIn this staff-level role, you will contribute to the end-to-end development of advanced communication algorithms and their efficient RTL implementation targeting FPGA and ASIC platforms.

You will play a critical role in defining system architecture, making key performance trade-offs, and translating complex DSP concepts into robust, silicon-ready digital designs. /ppThis is an opportunity to influence next-generation wireless platforms at both algorithm and implementation level — combining theory, architecture, and hands-on hardware validation. /pppbResponsibilities: /b /p /pppbAlgorithm Development System Architecture (50%) /b /p /pliDesign and develop advanced DSP algorithms for wireless communication systems, including modulation/demodulation, channel coding/decoding, synchronization, equalization, MIMO, and beamforming (20%) /liliArchitect system-level solutions and drive critical trade-off decisions across performance, power, silicon area, and time-to-market (10%) /liliImplement and validate algorithm prototypes in MATLAB, Python, or C/C++ for simulation and proof-of-concept demonstrations (10%) /liliConduct in-depth performance analysis, modeling, and optimization studies to ensure robust and scalable designs (10%) /lippbRTL Design Digital Implementation (20%) /b /p /pliParticipate in RTL design and implementation using Verilog, VHDL, or SystemVerilog for FPGA and ASIC targets (10%) /liliTranslate complex DSP algorithms into efficient and scalable digital architectures optimized for timing, power, and area constraints (10%) /lippbIntegration, Validation Technical Leadership (30%) /b /p /pliSupport lab bring-up, testing, and characterization of designs on hardware platforms (10%) /liliCollaborate closely with RF engineers, firmware developers, and system architects to integrate DSP blocks into the overall system architecture (10%) /liliDocument algorithms, specifications, and implementation details to enable knowledge sharing and design continuity (10%) /lippbMinimum Qualifications: /b /p /pliMaster’s or PhD degree in Electrical Engineering, Computer Engineering, or related field /lili3+ years of experience in DSP algorithm development and RTL design for wireless communication systems /liliExpert level understanding of communication theory and signal processing algorithms (timing recovery, channel estimation, AGC, equalization, OFDM, MIMO, etc.) /liliDeep knowledge of wireless communication protocols and standards (Wi-Fi 802.11, Bluetooth) /liliExpert proficiency in MATLAB/Simulink and C/C++ for algorithm modeling and simulation /liliKnowledgeable proficiency in Verilog, VHDL, or SystemVerilog for RTL design /liliExtensive experience with FPGA development tools (Xilinx Vivado, Intel Quartus) and/or ASIC design flows /liliExperience with RTL verification methodologies including simulation, formal verification, and UVM /lippbDesired Qualifications: /b /p /pliExperience with digital predistortion (DPD), crest-factor reduction, or PA linearization techniques /liliKnowledge of HW/SW co-design, firmware integration, and modem L1/L2 development /liliExperience with high-level synthesis (HLS) tools /liliExperience with power optimization techniques for embedded systems /liliTrack record of patents or publications in signal processing or wireless communications /liliExperience running synthesis, place-and-route, and timing closure activities using industry-standard EDA tools /lippbCareer Growth Philosophy: /b /p /ppAt Semtech, we believe that innovation starts with people. We are committed to empowering professional development through access to mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment. /ppOur pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities. /ppThe intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job.

Incumbents may be required to perform job-related tasks other than those specifically included in this description. /ppAll duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities. /p