Paman Gober

Assisted laboratory sessions covering Verilog HDL, RTL design, FPGA synthesis, and ModelSim simulation. Supported FPGA hardware debugging and guided students through timing analysis and digital system verification.

Digital Design Teaching Assistant at Dept. of Electrical & Informatics Engineering (2026-02 – 2026-07)

• Assisted laboratory sessions covering Verilog HDL, RTL design, FPGA synthesis, and ModelSim simulation.
• Supported FPGA hardware debugging and guided students through timing analysis and digital system verification.

External Electronics Engineer at Gadjah Mada Marine and Naval Research (2025-09 – 2026-02)

• Designed a power distribution board (PDB) for an Autonomous Surface Vehicle supporting 2100 W peak system power.
• Optimized PCB layout for power integrity, thermal management, high-current routing, and EMI-aware component placement within mechanical enclosure constraints.

Engineering Intern at Technology Innovation Learning Center SV UGM (2025-08 – 2025-12)

• Architected a modular C++ framework for motion control, trajectory planning, and hardware abstraction, implementing deterministic 10 kHz timer-driven step generation for real-time multi-axis motion.
• Developed a multi-drop UART framework for three TMC2209 drivers with boot-time diagnostics, persistent configuration storage, and interrupt-safe synchronization for deterministic firmware execution.

Electronics Engineer Intern at Formulatrix Indonesia (2024-09 – 2025-01)

• Designed an IEC 61010-1:2016 compliant touch current measurement system, integrating analog signal conditioning and digital filtering for low-level leakage evaluation.
• Implemented hardware timer-triggered ADC sampling with DMA buffering to perform continuous RMS averaging while offloading CPU processing overhead.

Bachelor of Applied in Instrumentation and Control Engineering – Universitas Gadjah Mada (2022-07 – 2026-07)