CPU Performance Modeling Architect

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data.Models CPU functionality, performance and/or power in pre-silicon simulatorsDefines and runs performance experiments to aid feature definition.

Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models.Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages.Potentially (in the future), lead a team doing above activities.An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.Requirements: Requirements:BSc or higher degree in Computer Science/Engineering or related discipline from a leading university. (Alternatively, exceptional proven track record in similar tasks).3+ years of experience in one or more of following disciplines: development of simulators/emulators for CPUs, definition of CPU features, HW/SW co-design, Low level performance profiling and optimization of SW with exposure to CPU ISA.Fluent spoken and written English.Behavioral skills: Team player. Interpersonal skills needed to collaborate with colleagues towards achieving a technical goal.Advantageous qualifications:Experience in SW/HW codesign or in definition of new instructions will be a great advantage.Familiarity with dense compute workloads and analysis (e.g., AI, HPC, financial, etc.).Familiarity with Vector Architectures.This position is open to all candidates.