Package Design/Technology/Layout Engineer

Package Design/Technology/Layout EngineerShare

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Location

• Google Place: Haifa, Israel ; Tel Aviv, Israel

Experience Level

• Early

  Early experience completing work as directed, and collaborating with teammates; developing knowledge of relevant concepts and processes.

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Job DetailsMinimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 1 year of experience with semiconductor package design and substrate layout.
• Experience with industry-standard packaging EDA tools such as Cadence APD/APD+, Cadence Allegro, or Siemens/Mentor Xpedition.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Strong understanding of substrate manufacturing processes, materials, and design rules.
• Proven track record of taping out high-pin-count, high-speed flip-chip packages.

About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Drive the physical layout of high-performance package substrates, from initial bump/ball map feasibility and pin-out optimization to final Gerber/GDS release.
• Design and layout complex 2.5D/3D architectures, including flip-chip BGA (FCBGA), Silicon Interposers (CoWoS).
• Partner with SoC designers and System board engineers to co-optimize die-to-package and package-to-board interconnects, and work intimately with Signal and Power Integrity teams to optimize trace routing, decoupling capacitor placement, and power plane geometries to meet electrical targets.
• Interface with leading foundries and OSATs to evaluate new packaging technologies, establish Design Rule Checks (DRC), and influence future package technology roadmaps, and develop scripts and CAD methodologies to automate tedious layout tasks, improve design quality, and shorten cycle times.

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Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc.

Alphabet

Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Locations

• Google Place: Haifa, Israel; Tel Aviv, Israel
• Experience Level: Early

  Early experience completing work as directed, and collaborating with teammates; developing knowledge of relevant concepts and processes.