senior analog layout design engineer

perform physical layout for mixed-signal functions like pll's, high speed i/o circuits, serdes, general i/o's, esd structures designs in state-of-the-art sub-micron cmos finfet technologies using cadence tools you will work with asic and mixed-signal engineers to customize designs for integration in vlsi products.

job duties will include floor planning, custom layout and verifying against design rules and schematics, em/ir analysisRequirements: what we need to see: you will have a minimum of 8 years of relevant mask analog layout experience an electronics practical engineer certificate or a b.sc. in electrical engineering proven understanding of analog circuit layout concepts in submicron cmos technologies - such as operational amplifiers and adc/dacs. you are an expert with cadence custom circuit design tools - particularly virtuoso experience running and debugging drc and lvs with verification tools such as icv, calibre you can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.ways to stand out in the crowd: proficiency in scripting languages like Python, skill knowledge of drc and lvs checking flows, em/ir tools, ability to customize drc and lvs decksThis position is open to all candidates.