Sta jobs in Mumbai

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

Evoke HR Solutions Pvt. Ltd.

If you are interested, please share your updated CV on Vishal@evokehr.com Job Description:- You will be part of a Physical Design / Timing Closure team for projects with GHz freq range and cutting-edge technologies. You will develop timing constraints for full chip or block level and be responsible

UST

Job Title: STA Engineer (Static Timing Analysis) Experience Level: 5+ years Location: Pune, India Job Summary: We are looking for a skilled Static Timing Analysis (STA) Engineer to perform full‑chip and block‑level timing analysis for advanced SoC designs. The candidate will work closely with Design

HCLTech

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

HCLTech

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

Eximietas Design

Greetings from Eximietas Design... !

Eximietas Design

Greetings from Eximietas Design... !

Greetings from Eximietas Design... ! 🚀 We’re Hiring – Senior STA Professionals. 📅 April, 2026 We are actively looking for highly experienced STA professionals to join our growing global team. 🔎 Experience Required: 6 to 20+ Years 📍 Locations: 🇮🇳 India – Bengaluru, Hyderabad, Pune & Ahmedabad �

Eximietas Design

Greetings from Eximietas Design... ! 🚀 We’re Hiring – Senior STA Professionals. 📅 Apr, 2026 We are actively looking for highly experienced STA professionals to join our growing global team. 🔎 Experience Required: 6 to 30+ Years 📍 Locations: 🇮🇳 India – Bengaluru, Hyderabad, Pune & Ahmedabad 🇺�

Eximietas Design

Greetings from Eximietas Design... ! 🚀 We’re Hiring – Senior STA Professionals. 📅 April, 2026 We are actively looking for highly experienced STA professionals to join our growing global team. 🔎 Experience Required: 6 to 20+ Years 📍 Locations: 🇮🇳 India – Bengaluru, Hyderabad, Pune & Ahmedabad �

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

Confidential

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

Confidential

Faststream is hiring a Seasoned STA Engineer. Here are some details on what is expected. Responsibilities: Lead timing closure for sub-system/partition or full-chip level designs Collaborate with RTL, DFT, and IP teams to drive iterative timing feedback and closure Deliver timing collateral and sign

HCLTech

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

( Principal Engineer, Static Timing Analysis (STA) Location: Greater Bengaluru Area (Hybrid-2 days office/ 3days home)/Remote (Any where in India ) About Company: EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-gen

HCLTech

An STA (Static Timing Analysis) Engineer is a critical specialist in the semiconductor design lifecycle, primarily responsible for timing sign-off and closure of high-performance Integrated Circuits (ICs) and System-on-Chips (SoCs). Their goal is to ensure the chip operates at its target frequency w

(www.enchargeai.com) Principal Engineer, Static Timing Analysis (STA) Location: Greater Bengaluru Area (Hybrid-2 days office/ 3days home)/Remote (Any where in India ) About Company: EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust an