Aarsha B

Results-driven PCB Design Engineer with hands-on experience delivering IPC-compliant, high-performance multilayer PCBs across space, industrial, and automotive verticals using Altium Designer. Skilled in mixed-signal, RF, and high-speed digital design with a strong focus on signal integrity, EMI/EMC compliance, and zero-defect reliability.

Junior PCB Design Engineer - Vinvish Technologies Pvt.Ltd - Trivandrum

(2023-09)

• Engineered an 8-layer high-speed backplane PCB with systematic crosstalk mitigation, maintaining signal integrity across multi-connector, high-density interconnect environments.
• Designed an RF PCB for VSSC space applications in compliance with IPC Class 3 standards.
• Developed a 10-layer, high-density BGA-based PCB for ISRO/VSSC space systems, implementing fine-pitch fan-out routing on BGAs and adhering to IPC Class 3 and ISRO PAX-301 standards to ensure space-grade reliability under vibration, thermal cycling, and radiation environments.
• Pioneered a flex PCB connector board using X-Y routing technology, compliant with IPC-6013 Class 3 high-reliability standards — enabling reliable interconnect performance in high-flex-cycle, space-constrained applications.
• Performed comprehensive DRC verification, trace length matching, and differential pair routing for high-speed interfaces (e.g. USB, DDR), ensuring timing skew within design spec and reducing board re-spin risk.
• Built and maintained IPC-7351-compliant footprint libraries for components, standardizing land patterns, courtyard definitions, and 3D models — improving team design reuse efficiency and reducing library-related DRC failures

B.Tech - Electronics and communication - Mar Baselios college of Engineering (2019-03 - 2023-03)