Aditya Karsaliya

M.Tech graduate in Semiconductor Technology with a strong foundation in semiconductor manufacturing, electronics, and test engineering concepts. Proficient in C programming and Linux with strong analytical and problem-solving abilities. Familiar with semiconductor testing and engineering data analysis through academic coursework and projects. A quick learner with excellent communication and teamwork skills, eager to contribute to semiconductor manufacturing and test engineering.

PHYSICAL DESIGN ENGINEER INTERN - NEUROSILIX

(2025-08 - 2026-04)

• Worked On Leon Processor Design In 45nm Technology.
• Worked on block-level Physical Design flow from floorplanning to routing using Cadence Innovus.
• Completed Floorplanning, Achieving 65% Core Utilization and an Aspect Ratio Of 0.5.
• Used Placement bounds and path groups for better timing results.
• Used magnet placement for macros to improve connectivity and timing
• Analyzed reports such as report_timing, report_clock_timing, report_power.

M.Tech - Semiconductor Technology - Nirma University (2026)

B.Tech - Electronics & Communication Engineering - Gec Gandhinagar (GTU) (2024)