Aditya Patil

Results-driven Hardware Design Engineer with 6+ years of end-to-end product development experience at Tessolve. Expert in high-speed board architecture, complex mixed-signal design, and rigorous electrical validation. Proven track record spanning PCIe architectures, LPDDR4 memory, and Ethernet protocols. Strong expertise in signal integrity, root-cause analysis, and hardware lifecycle management to drive innovation from concept to mass production.

Design Engineer 2 - Hardware at Tessolve Semiconductors (2019-01 – Present)

• Architected and developed high-speed hardware platforms from concept to production, specializing in board-level architecture and hardware-software integration.
• Led comprehensive board bring-up for complex multi-layer PCBs, conducting root-cause analysis and hardware debugging to ensure high-yield manufacturing and streamline prototype iterations.
• Performed rigorous hardware electrical validation and signal integrity analysis for high-speed communication interfaces, including SerDes register tuning to meet power budget requirements.
• Conducted comprehensive DFX analysis, proactively identifying End-of-Life (EOL) risks and mitigating supply chain bottlenecks.

M.Sc in Electronics – Karnatak University, Dharwad (2017-01 – 2019-01)