Bharani V
Electronics and Communication Engineering student with hands-on experience in Digital RTL Design and Verification
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About
Electronics and Communication Engineering student with hands-on experience in Digital RTL Design and Verification using Verilog HDL and SystemVerilog. Familiar with RTL simulation, functional verification, testbench development, waveform analysis, functional coverage, and Logic Equivalence Checking using Cadence tools. Seeking a Design Verification Engineer role to contribute to RTL verification, functional validation, debugging, and development of reliable digital designs.
Education
B.E. - Electronics and Communication Engineering - KGISL Institute of Technology, Coimbatore (2023 - 2027)
Higher Secondary Education - HSC - Muthamizh Government Higher Secondary School
