Darun Eiswar S

Electronics and Communication Engineering graduate with hands-on experience in C programming, embedded systems, and Linux-based platforms (Raspberry Pi), plus hardware-software integration across FPGA-based SoC designs using AMBA AHB/APB and AXI protocols. Skilled in protocol-level debugging, RTL validation, and building real-time embedded applications. Seeking an Embedded Systems / Firmware Engineer role focused on hardware-software integration on Linux-based embedded platforms.

Research Intern – FPGA Systems at National Institute of Technology (NIT), Trichy (2025-04 – 2025-06)

• Designed and validated RTL modules for an FPGA-based Network-on-Chip using Verilog/SystemVerilog.
• Performed synthesis, implementation, timing analysis, and hardware validation in Vivado.
• Implemented and tested AXI-based communication between Processing System and Programmable Logic on a Xilinx Zynq FPGA, directly involving hardware-software integration.

VLSI Design Intern at Maven Silicon (2024-07 – 2024-08)

• Designed and verified an AMBA AHB-to-APB bridge using SystemVerilog.
• Performed RTL simulation, waveform debugging, and protocol verification.
• Worked with RTL design, finite state machines (FSMs), and AMBA bus protocols.

B.Tech in Electronics and Communication Engineering – Amrita Vishwa Vidyapeetham (2022 – 2026)

Class XII – Holy Angels Matric Hr. Sec. School (2021 – 2022)

Class X – Holy Angels Matric Hr. Sec. School (2019 – 2020)