Design and verification engineer
Send a job offer directly to this candidate
I am a BTech Graduate passionate about VLSI , having 6 months internship experience in Design and Verification from Siemens EDA. I also secured Gate rank 1315 in year 2024 ECE branch. I am a passionate individual with high enthusiasm and communication skills with whom you loved to work .
I am having 6 months industry experience in Design and Verification domain in Siemens EDA . There I worked in NVMe protocol and created testcases for basic commands.
I had done Btech from silicon institute of technology, Bhubaneswar in ECE branch .
