Harsh Mishra

Visiting Research Scholar, JST-Lotus Fellowship - National Institute For Materials Science (NIMS) - Tsukuba, Japan

(2025-06 - 2025-12)

Superconducting Materials for TSVs for vertical integration of superconducting qubits

Teaching Assistant - Indian Institute of Technology (IIT), Hyderabad - Hyderabad, India

(2022-12)

Teaching Assistant under Prof. Shiv Govind Singh, Prof. Gajendranath, and Prof. Shubhadeep.

TA for ATMP Course (Co-supervised with Micron, India team to Mtech Students)
TA for Basic Electronics Lab.
Mentor 3 Mtech students on glass to silicon low temperature, Niobium-Niobium direct wafer level bonding (Currently placed in Intel, Micron, and Texas Instruments India).
Mentored 4 UGs students on the Quantum Computing project at IIT Hyderabad.

Training and Placement cell Member - Indian Institute of Information Technology(IIIT), Senapati, Manipur - Imphal, India

(2021-07 - 2022-06)

Research Project Member - Google - Bangalore, India

(2026-02)

AI/ML driven thermal-aware co-optimization framework for TSV-based 3D superconducting quantum processor architecture.

Dataset Generation: Structured FEM simulations under cryogenic conditions to generate training data across TSV configurations (count, depth, placement, liner thickness, materials).
Modeling: Development of machine learning models to learn the mapping from packaging parameters to peak qubit temperature.
Incorporation of cryogenic thermal conductivity models into Physics-Informed Neural Networks (PINNs) to embed physical constraints and improve generalization.

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