J Ruthra Moorthy

Designed a Secure ALU in Verilog HDL using XOR Logic Locking and FSM-based Key Locking. Developed RTL modules and verified them through simulation, synthesis, and functional testing in Xilinx Vivado.

Research Intern – VLSI Hardware Security - SRM University AP

• Designed a Secure ALU in Verilog HDL using XOR Logic Locking and FSM-based Key Locking.
• Developed RTL modules and verified them through simulation, synthesis, and functional testing in Xilinx Vivado.

VLSI Security and AI Intern - SECENAI Semiconductors and Test Solutions Pvt. Ltd.

• Researched hardware security architectures including Physical Unclonable Functions (PUF).
• Built a Python-based adversarial attack framework to evaluate AI-driven vehicle detection systems and contributed to secure drone research.

Bachelor of Technology (B.Tech) - Electronics and Communication Engineering - SRM University AP (2023-01 - 2027-12)

Tamil Nadu Higher Secondary Examination (2022-01 - 2022-12)

Tamil Nadu Secondary Examination (2021-01 - 2021-12)