
Firmware Engineer
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3 years 8 months of working experience as Firmware Engineer. Knowledge and experience in developing drivers and applications in Ti, STM and LPC microcontrollers. Knowledge and experience in modifying boot locations of the application image for upgrade in Ti and STM controllers. Knowledge and experience in developing device drivers and applications on Linux and android environment at boot, kernel and filesystem level.
Experience in I2C, SPI, UART and MDIO protocols.
Firmware Engineer - Sanmina-SCI, India Design Center - Chennai
(2010-09 - 2014-05)
Firmware Engineer - Sanmina-SCI, India Design Center
(2013-08 - 2014-05)
The device is a smart sensor with the ability to acquire and store: Breathing, motion, Ambient light and Temperature. It has the ability to interface to a smart device via Bluetooth in order to receive commands to start and stop acquisition and also to forward the stored data. It is also able to send notifications to the smart device when certain environmental and internal events occur.
Firmware Engineer - Sanmina-SCI, India Design Center
(2012-06 - 2013-05)
Hand held printing device running android on arm core, displays the images present in sdcard on a graphical LCD. On a touch event to print image is processed in dsp core for printing.
Firmware Engineer - Sanmina-SCI, India Design Center
(2011-12 - 2012-06)
The Network Storage Product has 8 Hard Disks which are controlled by LSISAS9211-8i (network storage Controller). Software scope of work involves developing the hardware validation test suite over Linux platform to test and verify the hardware peripherals of the board.
Firmware Engineer - Sanmina-SCI, India Design Center
(2011-07 - 2011-12)
SPD Data generator Tool generates Binary and Word Files that can be used for programming the EEPROM in Memory Modules of DDR1, DDR2 or DDR3 with different configurations and form factors and it supports all types of memory modules like unbuffered, registered etc.
Firmware Engineer - Sanmina-SCI, India Design Center
(2010-10 - 2011-05)
eLoopback CFP module is designed in CFP module form factor and it can be accommodated in standard CFP host cage. It is designed for looping back the incoming 1 Gbps lanes to provide test feature for other CFP modules. It uses a Microcontroller for implementing MDIO slave interface (Clause 45, defined for CFP Specification) and dummy loads to dissipate certain amount of power in according to CFP specification.
B.E - Electronics and Communication Engineering - Hindusthan College Of Engineering and Technology, Coimbatore (2010)
H.S.C - Math, Computer Science - Vivek Vidhyalaya Matriculation Higher Secondary School, Coimbatore (2006)
SSLC - Dr. V.G.N. Matriculation Higher Secondary School, Coimbatore (2004)