Keerthana
Final-year Electronics and Communication Engineering student with hands-on experience in FPGA Design, Verilog HDL, Vivado, Vitis, PCB Design, MATLAB, Cadence Virtuoso, Embedded Sys
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About
Final-year Electronics and Communication Engineering student with hands-on experience in FPGA Design, Verilog HDL, Vivado, Vitis, PCB Design, MATLAB, Cadence Virtuoso, Embedded Systems and IoT. Passionate about digital system design, FPGA development and embedded technologies with strong analytical, problem-solving and teamwork skills.
Experience
FPGA Design Intern at CUSAT (2026-06)
- Designed FPGA-based digital systems using Verilog HDL.
- Developed hardware using Xilinx Vivado and embedded software using Vitis.
- Performed RTL design, synthesis, implementation, bitstream generation and hardware validation.
- Verified FPGA functionality through simulation and hardware testing.
PCB Design Trainee at Rever Tech (2025-06)
- Designed schematics and PCB layouts using EasyEDA.
- Performed PCB routing, Design Rule Check (DRC)
- Tested and validated fabricated PCB functionality.
Education
Bachelor of Technology in Electronics and Communication Engineering – Sahrdaya College of Engineering and Technology (2023 – 2027)
Secondary School in Kerala State Board – Govt.
Moyan Model Girls Higher Secondary
School
Higher Secondary in Kerala State Board – Govt.
Moyan Model Girls Higher Secondary
