Physical Design Intern
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Acquired practical knowledge of VLSI design flows, including front-end (RTL design and simulation) and back-end (physical design, floorplanning, placement, and routing) using Cadence Genus and Innovus tools. Gained hands-on experience with semiconductor design methodologies, Linux commands, and key concepts of semiconductor fabrication and the semiconductor industry.
Physical Design Intern - Abhyasa Semicon Technologies
(2025-05)
B.TECH - AITAM (2022 - 2026)
Class 12th - BIEAP (2020 - 2022)
Class 10th - SSC (2019 - 2020)