Final Year ECE Student | Digital System Design & VLSI Enthusiast
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Enthusiastic final Year ECE student with a strong interest in Digital System Design and VLSI. Actively learning Verilog HDL with hands-on exposure to Synopsys EDA tools, including VCS, Verdi, Design Compiler (DC), and IC Compiler II (ICC2). Seeking opportunities to build practical expertise in chip design and core hardware engineering.
B.E. - Electronics and Communication Engineering - Arunachala College of Engineering for Women
Higher Secondary (Class XII) - St. Stella's Matric Higher Secondary School
