VLSI Design Intern
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Trained in Verilog, SystemVerilog, RTL design, and logic synthesis using OpenROAD. Implemented and verified a 3-to-8 decoder; gained experience in SoC architecture, timing analysis, and power optimization.
VLSI Design Intern - VTU & Rooman Technologies
(2024-09 - 2025-02)
IoT & Embedded Systems Intern - Tech Graylogix
(2023-10 - 2023-11)
Bachelor of Engineering - Electronics & Communication - Bearys Institute of Technology, Mangaluru (2021 - 2025)
Certificate - Embedded Systems & Industrial Automation - Coastal Institute of Technology and Management (2025-06)