Nakhila J
Final-year ECE student with a strong passion for VLSI design, FPGA development, and telecommunication systems
Talent
PālghātMember since June 20, 2026
VERILOG HDLFPGA developmentVLSI design
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VERILOG HDLFPGA developmentVLSI design
About
Final-year ECE student with a strong passion for VLSI design, FPGA development, and telecommunication systems. Actively exploring modern hardware technologies and communication systems with a goal to innovate in core electronics domains.
Experience
Internship - BSNL - Palakkad
(2025-06 - 2025-06)
- 3-week internship at BSNL, gaining practical exposure to telecom infrastructure, including hands-on experience in OFC splicing, network setup, and communication systems.
Internship - NIELIT - CALICUT
(2024-06 - 2024-07)
- Completed a 4-week internship on Digital System Prototyping using FPGAs.
- Designed FPGA prototypes on Arty A7-1000T using Vivado
Education
Bachelor of Technology - ECE - NSS COLLEGE OF ENGINEERING (2022 - 2026)
Higher Secondary - GVGHSS Chittur (2022)
High school - VMCEMGHSS CHITTUR (2020)
Skills
FPGA developmentand telecommunication systems
