Nese Renuka
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About
3 years of experience in Design Verification Engineering. Proficiency in UVM Testbench flow with a strong grasp of SV-UVM coding. Skilled in debugging and reporting. Familiarity with bus protocols including AMBA-APB, AHB, AXI and SPI. Results-driven VLSI Design and Verification Engineer with hands-on expertise in ASIC front-end design. Strong foundation in RTL coding, functional verification, and coverage-driven methodologies. Experienced in SoC-level verification flow.
Experience
Maverick Semiconductors Private Limited
PPPASSCHIP Semiconductors Private Limited
Education
M.Tech - Electronics & Instrumentation - Andhra University (2020-01 - 2022-12)
B.Tech - Electronics & Communication - G. Pulla Reddy Engineering College (2015-01 - 2019-12)