Parth Jadvani

Specialized in embedded systems for automotive, infotainment, mobile camera platforms and system automation. Accelerated GPU performance by offloading compute kernels to processor-in-memory for CUDA libraries, including cuBLAS and cuDNN. Designed and implemented performance and functional models for Qualcomm camera platforms, and drove multicore firmware integration on heterogeneous hardware such as TDA2x, TDA3x, and AM5728.

Delivered measurable performance improvements through targeted DSP and ARM optimization of complex signal processing algorithms.

Senior Staff Engineer - Samsung Semiconductor India Research

(2022-08)

• Processor-in-Memory & GPU Optimization: Drove PIM architectural enhancements, built custom GPGPUSim/PIM-Sim models, and optimized PyTorch LLM workflows across cuBLAS and cuDNN to quantify and improve system-level GPU performance.
• Memory Controller Architecture: Contributed to end-to-end LPDDR5 and DFI controller development, from specification and RTL design through integration and validation, delivering JEDEC-compliant, high-performance, and interoperable memory subsystems.

Senior Software Engineer - AMD

(2021-08 - 2022-08)

• Implemented Widevine DRM schemes and supported codecs including H.264, HEVC, VP9, AV1.

Software Engineer-II - Qualcomm

(2018-07 - 2021-07)

• Conducted performance modeling through SystemC for evaluating camera use case tradeoffs.
• Designed C++ and Python reference ISP models to support RTL functionality verification efforts by DV team.

Software Engineer - Pathpartner Technology

(2017-01 - 2018-06)

• Embedded Vision & ML Architecture: Architected production-grade CV/ML applications on TI TDA3x and Continental platforms, optimizing DSP/EVE kernels, classical ML algorithms (HOG, LBP, SVM, AdaBoost), and custom hardware IP for deterministic performance.
• Automotive Image Processing and Compliance: Designed and delivered surround view systems with advanced image stitching and calibration by extending OpenCV modules, while ensuring MISRA-C:2012 compliance and static analysis sign-off using Klocwork.

Associate Engineer - Physical Research Laboratory

(2015-08 - 2016-07)

• Designed FPGA based Gamma Ray Spectrometer with Verilog processing and LabVIEW data acquisition.

Intern - Strawberry Enterprise

(2013-08 - 2014-05)

• Speech and gesture-based laptop automation enhancing accessibility for differently abled users.

M.E. - VLSI & Embedded System Design - CDAC & Gujarat Technological University, India (2014 - 2016)

B.E. - Electronics & Communication - Gujarat Technological University, India (2010 - 2014)