Pradeep Das

Passionate electronic enthusiast with hands-on experience in designing and building projects using Verilog and Embedded C. Have keen interest in analog circuit design and product development.

Vocational Trainee - DRDO

(2024-05 - 2024-06)

• Studied radar system components, including transmitters, receivers, antennas, signal processors, and Microwave Devices during an internship at DRDO.

Online Intern - NIELIT

(2024-06 - 2024-07)

RTL Design using Verilog HDL

• Studied RTL design, Verilog, System Verilog during the internship and made project using this tools and technology.

Bachelor of Technology - Electronics and Telecommunication - Veer Surendra Sai University of Technology, Odisha (2021 - 2025)

Diploma - Electrical and Electronics Engineering - Nilasaila Institute of Science and Technology, Balasore (2019 - 2022)

Matriculation - Radhanath BidyaPitha, Soro (2005 - 2017)