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Prateek Jevoor

Prateek Jevoor

Senior Automotive System Test & HIL Validation Engineer

Talent
BelgaumMember since August 12, 2026
ADAS Feature ValidationASPICECANoeTrace32Robot FrameworkJenkinsDOORSJIRADOORS NGRTCCANUDSFlexRayXCPSomeIPASAP2 StudioADAS
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ADAS Feature ValidationASPICECANoeTrace32Robot Framework

About

Visionary professional specializing in Automotive Embedded Systems with focus on System Test Engineering and HIL validation. Targeting opportunities in automotive domain, preferably in Pune & Bengaluru, to leverage expertise in ECU validation, diagnostics and embedded system testing for high-quality product delivery.

Senior Automotive System Test

Engineer with nearly 4 years of experience in ECU validation, HIL testing and ADAS feature verification for premium OEMs (Audi, JLR, Bosch, Stellantis). Expertise in end-to-end validation of embedded systems, covering Instrument Cluster, ADAS (FCW, LKA, Night Vision) and ECU communication integrity. Hands-on with automotive protocols and diagnostics, CAN, UDS, XCP, SOME/IP, FlexRay, skilled in debugger and calibration-driven workflow.

Developed automation frameworks using Python, CAPL, CANoe, Robot Framework and Jenkins to enhance regression coverage and validation efficiency. Proficient in DOORS traceability, ASPICE processes, defect lifecycle (JIRA/RTC) and crossfunctional coordination, with mentoring experience for junior team members.

Experience

System Test Engineer at STELLANTIS (2024-04 – 2025-08)

Project: P1H Instrument Cluster / IVI ( Chrysler, Maserati )

  • Executed ADAS feature validation for Instrument Cluster systems within P1H program, covering 4–5 key features including Night Vision, FCW and LKA and designing 200+ comprehensive test cases.
  • Analyzed and consolidated cluster-level requirements to ensure technical completeness, traceability and alignment with system specifications.
  • Leveraged HIL setups with VN5650 and VN1640 hardware for Ethernet-based validation of SomeIP signals, integrating updated requirements in DOORS Next Gen.
  • Developed and executed HMI cluster test cases, systematically documenting results and maintaining traceability in RTC.
  • Monitored defect lifecycle in RTC, logging, tracking and revalidating issues to ensure accurate status updates and timely closure.
  • Authored and validated diagnostic module test cases for IPC ECU systems, designing positive and negative scenarios aligned with speed, warning indicators and diagnostic requirements.
  • Supported requirements team in analyzing the documents for consolidating of various Instrument cluster features into DOORS NG.
  • Supported in HIL hardware setup and remote access.

System Test Engineer at BOSCH (2021-09 – 2024-04)

Project: Jaguar Land Rover – DASy

  • Executed debugger-driven and XCP-based validation for DASy ECU modules, verifying end-to-end communication, including Rx and Tx signal integrity.
  • Conducted output and memory pool validation leveraging XCP calibration techniques, adapting A2L files in ASAP2 Studio to support calibration updates.
  • Validated diagnostic modules through dedicated test benches, simulation environments and Vector RT/VT racks, ensuring comprehensive system verification.
  • Deployed Vector hardware tools (VN5610, VN5650, VN1640A, VX1135) to perform CAN/Ethernet interface testing and XCP validation workflow.
  • Automated simulation and test scenarios using Python, integrating CANoe and Jenkins pipelines, while authoring test cases with Python-CAN libraries and Robot Framework.
  • Developed CAPL scripts for CAN frame transmission and validation, identified software anomalies and documented defects in JIRA for structured issue tracking.
  • Authored and validated diagnostic module test cases for IPC ECU systems, designing positive and negative scenarios aligned with speed, warning indicators and diagnostic requirements.
  • Engineered transport layer validation scenarios for UDS over CAN protocol and executed PDU message simulations using CAPL editor and scripts.
  • Optimized existing test suites based on requirement changes and review feedback, tracked ticket lifecycles, analyzed defects in JIRA and conducted retesting.
  • Executed ECU flashing procedures and validation cycles for updated builds, ensuring functional and performance compliance.
  • Supported in ECU flashing with UDS protocols and as well as support in Trace32 flashing.
  • Supported in HIL hardware setup and support for remote access.

Education

B.E. in Electronics & Communication Engineering – Jain College of Engineering (2018)

Diploma in Electronics & Communication Engineering – Vasanth Rao Potdar Polytechnic (2014)

Reviews

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