PraveenKumar Chakkaravarthy

Results-driven Data Science and QA professional with hands-on experience in machine learning model development, NLP pipelines, and structured software testing. Skilled in Python, Scikit-learn, LangChain, and retrieval-augmented generation (RAG) workflows. Demonstrated ability to improve model accuracy, reduce defect rates, and deliver production-grade ML prototypes. Seeking to contribute to data-centric teams building intelligent, testable software systems

Data Science & QA Intern at VCodez (2025-08 – 2025-10)

• Designed and deployed small-scale ML classification and NLP applications using Python, achieving a 30% improvement in feature-readiness and output consistency
• Built machine learning models for classification and text similarity tasks on cleaned datasets, resulting in a 25% improvement in model validation accuracy and prediction stability
• Implemented end-to-end NLP pipelines covering text cleaning, tokenization, and TFIDF/embedding vectorization with Scikit-learn and NLTK, increasing text processing accuracy by 28%
• Developed interactive AI prototypes using LangChain, Gradio, and vector databases (FAISS/Chroma) to support retrieval-based question answering (RAG) and chatbot workflows
• Performed iterative model tuning via hyperparameter optimization and cross-validation, strengthening solution reliability and analytical depth by 35% across iterations
• Designed and executed structured QA test cases for NLP pipeline outputs, validating tokenization behavior, input-output mappings, and edge-case failures to ensure system consistency
• Logged, tracked, and prioritized defects using a structured bug log; collaborated with team to achieve acceptance testing sign-off on all ML model outputs

PCB Design Engineer at Caliber Interconnects (2026-01 – 2026-07)

• Independently designed and peer-reviewed PCB layouts for client projects, ensuring compliance with electrical requirements and manufacturing design rules
• Executed DRC and ERC validations on completed designs, resolving layout violations and reducing fabrication rework costs
• Prepared complete fabrication packages (Gerber files, drill files, BOM) and coordinated handoff with manufacturing teams
• Maintained version-controlled design files with documented decision logs to ensure traceability and support future revisions

B.E. in Electronics & Communication Engineering – Mepco Schlenk Engineering College (2021-10 – 2025-05)

Senior Secondary in 12th Grade – St. Paul's Matriculation Higher Secondary School (2020-07 – 2021-03)