Rutuja Chavan
C++ and embedded developer
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About
C++ Developer with experience in automotive diagnostics, middleware development, and ECU validation systems. Strong background in modern C++ (C++14/17/20), multithreading, memory-safe design, and cross-platform development. Experienced in automotive communication protocols such as UDS, DoIP, CAN/CAN-FD and diagnostic standards including ISO 14229 and ISO 13400.
Proven ability to design scalable architectures, develop embedded diagnostic tools, and optimize performance-critical systems. Currently pursuing a Postgraduate Diploma in Computer Science from Indian Institute of Technology Bombay.
Experience
System Engineer at Tata Consultancy Services (TCS) (2022-08 – Present)
Client: Nissan
- Designed and implemented cross-platform middleware architecture using modern C++17/20
- Utilized smart pointers, RAII and multithreading (std::jthread) to improve performance and memory safety
- Implemented design patterns such as Factory, Adapter, Singleton and Interface Segregation
- Integrated automotive diagnostics communication through CAN, CAN-FD and DoIP using D-PDU APIs
- Introduced SonarQube static analysis to improve code quality and maintain MISRA compliance
- Led architecture discussions and mentored developers in modern C++ practices
- Developed modular diagnostic package on Raspberry Pi integrating CAN HAT, 4G HAT and RTC modules
- Implemented dynamic vehicle discovery using mDNS/DNS-SD
- Built secure cloud communication using AWS Lambda and MQTT
- Used ICEORYX middleware enabling zero-copy inter-process communication
- Implemented SSL based authentication for secure vehicle connectivity
- Built diagnostic validation tools using Vector CANoe and VTestStudio
- Developed gateway performance benchmarking tool using OBD on UDS (J1979)
- Simulated 50+ ECUs to test real-world diagnostic scenarios
- Performed diagnostics testing over UDS on CAN and UDS on DoIP protocols
Education
Postgraduate Diploma in Computer Science – Indian Institute of Technology Bombay (IIT Bombay)
Bachelor of Engineering in Electronics and Telecommunication – Government College of Engineering and Research, Avasari Khurd (Savitribai Phule Pune University) (2018 – 2022)
