Sai Sanjana

HIL Test Engineer with 3+ years at ZF Technology Center validating safety-critical automotive ECUs across Body Control, Powertrain, and ADAS-adjacent domains. Specialise in Black-box and Grey-box test design under ISO 26262 (ASIL A–D) and ASPICE SWE.4/SWE.5 frameworks, with hands-on mastery of dSPACE, Vector CANoe/CANape, and VT System across 5+ HIL benches. Built automation frameworks (CAPL + Python) that cut test cycle time by 45% and stand-up CI/CD regression pipelines via Jenkins.

Consistently bridges the gap between hardware behaviour and software requirements — finding defects early, reducing re-test churn, and keeping release timelines intact.

System Test Engineer - ZF Technology Center India - Hyderabad

(2022-07)

• Validated 7 ECU platforms across 250+ test cases per release — 0 escaped defects to system integration in the last 4 consecutive releases.
• Automated 45% of manual test effort through CAPL + Python frameworks, saving ~18 person-hours per test cycle.
• Reduced diagnostic test execution time by 60% via a centralised CAPL + Python DTC/UDS test suite, achieving 100% run-to-run repeatability.
• Built Python log-parser that compressed post-test analysis from 2 hours to under 10 minutes per cycle — freeing engineers for higher-value defect investigation.
• Designed and executed Black-box and Grey-box test plans from SWE.4/SWE.5 requirements, covering functional, regression, fault injection, and boundary scenarios across CAN, LIN, and FlexRay bus networks.
• Executed UDS (ISO 14229) diagnostic validation across 50+ services — ReadDataByIdentifier, WriteDataByIdentifier, RoutineControl, FaultMemory clear/read — across multiple diagnostic sessions (Default, Extended, Programming).
• Maintained HIL bench configurations for 5+ benches with zero configuration drift across variant ECU platforms, ensuring reproducible test environments through systematic version control of bench setups.
• Applied ISTQB test design techniques (equivalence partitioning, boundary value analysis, decision table) to structure test specs for traceability against ASPICE requirements.
• Developed 30+ CAPL scripts for CAN/LIN message simulation, signal fault injection, and DTC lifecycle validation — integrated into a structured, version-controlled test automation framework.
• Architected Jenkins CI/CD pipeline connecting CANoe and ECU-Test for automated sanity and regression suites; delivers build health feedback within 20 minutes of each code commit.
• Pipeline reduced regression-cycle overhead by 30% and enabled nightly builds to be verified without manual intervention.
• Diagnosed and resolved complex hardware–software interaction faults in ECU communication layers — improved CAN/LIN communication stability by 25% across impacted variants.
• Owned cross-functional triage sessions with SW developers and systems engineers; defined defect isolation strategies that reduced mean time-to-root-cause by an estimated 35%.
• Produced ASPICE-compliant test documentation: test plans, test specifications, and bidirectional traceability matrices linking requirements to test cases and results.

B.Tech - Electronics & Communication Engineering - Koneru Lakshmaiah University (2022)