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Find professionals and candidatesSastry Puranapanda

Sastry Puranapanda

Sastry Puranapanda

Principal Engineer

Talent

Hyderabad, HyderabadMember since 9 October 2022

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About

RTL Design and Design Verification

Experience

22 Years Design Verification, RTL ASIC and FPGA SOC

Education

MS Electronics, MTech ECE (PhD)ECE

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