Electronics Engineering Student at VIT, Vellore
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Electronics Engineering (VLSI Design and Technology) undergraduate at VIT Vellore with a 9.21 CGPA and strong interests in semiconductor design, digital systems and embedded technologies.
Experienced in Verilog, SystemVerilog, RTL design, FPGA development and Embedded IoT systems. Has done projects like Blockchain-based Supply Chain Tracking and Music Recognition.
Currently serving as Design Head at IEEE CAS VIT and previously interned at BSNL in telecom systems.
I am currently serving as the Design Head at IEEE CAS VIT where I have helped in organising hackathons and technical events. I have also done a 2 month Internship in Basic Telecom at BSNL Indore.
Currently pursuing a B.Tech in Electronics Engineering (VLSI Design and Technology) at Vellore Institute of Technology (2024–2028) with a CGPA of 9.21. Completed CBSE Class XII from Rankers International School, Indore (86.8%) and Class X from The Bhavans Prominent International School, Indore (91.67%).
