Electronics and Telecommunication Engineering Graduate | VLSI Design & ASIC Implementation
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Recent Electronics and Telecommunication Engineering graduate with a strong foundation in digital design, Verilog RTL development, and ASIC implementation flows. Completed coursework and projects in VLSI design, semiconductor device physics, and RTL-to-GDSII methodologies. Eager to leverage analytical abilities to develop high-quality synthesizable RTL and achieve timing-clean, DRC-compliant silicon solutions in a dynamic semiconductor environment.
Industry Training (Levels 1 & 2) at India Semiconductor Workforce Development Program (ISWDP) – IISc, Synopsys & Samsung Semiconductor (2026-02 – 2026-05)
Design Head at Vishwarkarma Expression Hub, Vishwakarma Institute of Technology (2023 – 2024)
B.Tech in Electronics and Telecommunication – Vishwakarma Institute of Technology (2026)