Thiru Thiru
DESIGN VERIFICATION ENGINEER
Talent
ChennaiMember since October 1, 2026
SystemVerilogassertion-driven and coverage-driven verificationAMBA APBVerilog RTLQuesta Sim
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SystemVerilogassertion-driven and coverage-driven verificationAMBA APBVerilog RTLQuesta Sim
About
Design Verification engineer with strong SV/UVM fundamentals, hands-on experience building testbenches from scratch, assertion-driven and coverage-driven verification. Verified an APB-interfaced SPI controller (100% functional coverage) and an AXI4 interconnect using a full UVM environment. Self-starter, strong communicator, immediately available.
Experience
VLSI Design and Verification Trainee - Maven Silicon
(2025-06)
- Trained hands-on in RTL design and simulation using Verilog and SystemVerilog, covering multiplexers, counters, FSMs, and shift registers.
- Applied training directly to the APB-SPI capstone project, verifying read/write protocol compliance end to end.
Education
B.E. - Electrical and Electronics - Karpagam College of Engineering, Coimbatore (2020 - 2025)
Secondary School Leaving Certificate - Jayarani Matric.School, Pudukkottai (2017 - 2018)
Higher Secondary Ceriticate - Govt.Model Hr Sec School, Pudukkottai (2018 - 2020)
Skills
DESIGN VERIFICATION ENGINEER
