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Vishnu Rajeev

Vishnu Rajeev

Embedded Hardware & Firmware Engineer | PCB Design & Validation

Talent
CochinMember since September 25, 2026
Schematic captureComponent selectionECG acquisitionUSBI2CSPIUARTInterface bring-upC++FreeRTOSDatasheet-driven driversBLE OTAOscilloscopeLogic analyzerJTAGSWDRegression testingWi-FiLoRaESP-NOWPcb DesignerPcb DesignPcb Layout Design
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Schematic captureComponent selectionECG acquisitionUSBI2C

About

Embedded hardware and firmware engineer with commercial experience designing compact mixed-signal PCBs and production firmware for connected medical devices. Owns schematic capture, component selection, 2- and 4-layer layout, analog and sensor integration, board bring-up, C/C++ drivers and manufacturing support. Hands-on with USB, I2C, SPI, UART, BLE, Wi-Fi and GNSS interface bring-up, using oscilloscopes, logic analyzers and JTAG/SWD to diagnose signal-integrity, timing, power and firmware failures.

Experience

Embedded Firmware Engineer / Systems Engineer at AUSA Health (2025-12 – 2026-08)

  • Led end-to-end electronics design for a 28×12 mm wearable, owning schematic capture, component selection, compact PCB layout, DFA, board bring-up and manufacturing support.
  • Developed datasheet-driven drivers for the TI AFE4960 24-bit ECG analog front end and TDK ICM-42607-P IMU, handling FIFO reads, ADC-ready interrupts, indirect registers and wake-on-motion over shared I2C.
  • Validated the ECG analog stage using SPICE simulation, including CMRR, right-leg-drive behavior and lead-off thresholds before hardware bring-up.
  • Developed a 3-lead ECG acquisition and encrypted BLE 5.3 streaming system at 24-bit/250 Hz, validating acquisition timing, sensor communication and wireless data integrity.
  • Root-caused an intermittent Beken BLE SDK failure by tracing callback behavior and implementing state-machine recovery, reducing device downtime from requiring a power cycle to ∼8 s.
  • Implemented BLE OTA using a PSRAM-backed ring buffer and credit-paced retransmission, isolating flash-write latency from the BLE host task and sustaining ∼8 KB/s.
  • Built automated HIL validation and an in-firmware hardware simulator, reducing board bring-up time and enabling repeatable regression testing in CI without physical sensors.
  • Delivered production firmware v1.1.0 at 62% flash utilization within a 352 KB / 32 KB memory budget with zero compiler warnings.

Embedded Systems Intern, R&D at SuperFabLab Kerala, Kerala Startup Mission (2024-06 – 2025-11)

  • Co-designed the PolyPlot controller motherboard with isolated stepper drive and motion-control MCU, owning schematic capture, PCB layout, board bring-up and production fault isolation across 28 deployed systems.
  • Wrote FreeRTOS firmware for tool-change scheduling, encoder-feedback positioning and machine-state management; diagnosed stepper signal-integrity faults with an oscilloscope and logic analyzer.

Education

B.Tech in Electronics & Communication Engineering – Government Model Engineering College (2024)

Skills

Embedded Hardware & Firmware EngineerPCB Design & Validation

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