Yash Soni

Hardware Engineer with 3+ years of experience in board-level power circuit design and hardware validation: power management circuits, ACDC/DC-DC conversion, battery charging, voltage and current sensing, and PCB layout with impedance-controlled and differential signal routing, including EMI/EMC mitigation (grounding, shielding, filtering). Skilled in board bring-up and validation (oscilloscopes, multimeters, logic analyzers) and circuit simulation with MATLAB Simulink and PSpice.

Background in functional safety analysis (DFMEA, FMEDA, FTA, ISO 26262) and requirement traceability, with strong documentation discipline.

Engineer - HL Mando Softtech India Pvt. Ltd. - Gurugram, India

(2024-06)

Promoted from Associate Engineer to Engineer, Jan 2025

• Part of the Brakes ECU design team, contributing to circuit and BOM development — including PCB-level EMI/EMC mitigation (grounding, shielding, filtering, layout) — for the MGH100 product and the IDB2 PLR (Integrated Dynamic Brake); see Projects below.
• Responsible for the local OEM application as the company decentralizes its R&D and establishes India as a global R&D hub.
• Perform functional safety analyses (DFMEA, FMEDA, FTA) to ISO 26262, including HRS-HDS and TSR traceability, and prepare test plans, validation reports, and safety documentation to support design reviews and audits.

Junior Hardware Engineer - SSTPL - Jaipur, India

(2023-09 - 2024-06)

• Designed multiple battery-operated boards for LoRaWAN-based products, including LoRaWAN gateways, applying power management and battery charging circuit design.
• Designed impedance-controlled RF circuits and differential pairs (USB, HDMI, Ethernet) as part of PCB layout for these boards, ensuring signal integrity to industry standards.
• Developed hardware requirement specifications and system design documents, and selected components based on performance, cost, and compatibility.
• Validated hardware designs through theoretical calculations, simulation, and empirical bench testing to ensure design robustness.
• Prepared documentation for PCB and PCBA manufacturing to streamline production and reduce build errors.

Internship — H Tracker, 4G MPCIe Card - SSTPL - Jaipur, India

(2023-01 - 2023-08)

• Developed and optimized a tracking application for a 4G MPCIe card (improving tracking accuracy by 20%) and collaborated on hardware-software integration testing to reduce system latency.

B.Tech - Electronics and Communication Engineering - JECRC (2019 - 2023)