Dong Nguyen Van

• Digital Design and Verification Engineer for more than five years with experience in design and verification on SoC.
• Experience in Verilog/ System Verilog-based verification, UVM methodology with AMBA bus protocol (APB, AHB, AXI).
• Familiar with some EDA design tools: Synopsys (Vcs, Design Compiler, Verdi); Cadence (xcelium, simvision), FPGA Xilinx Vivado.

• Digital Design and Verification Engineer for more than five years with experience in design and verification on SoC.
• Experience in Verilog/ System Verilog-based verification, UVM methodology with AMBA bus protocol (APB, AHB, AXI).
• Familiar with some EDA design tools: Synopsys (Vcs, Design Compiler, Verdi); Cadence (xcelium, simvision), FPGA Xilinx Vivado.

Bachelor's degree in Electronic and Communication Engineering