Berke Çınar

I am a senior Electrical and Electronics Engineering student at TOBB University of Economics and Technology with a 3.38 GPA. My professional foundation was built through high-stakes internships at leading defense companies like Roketsan and TÜBİTAK SAGE, where I specialized in digital design, VHDL-based systems, and multi-layer PCB layout. Beyond my technical engineering background, I have a deep passion for AI development.

I spent eight months building a social media application called 'Fıss' by effectively leveraging advanced AI prompting to guide the entire development cycle. This unique combination of engineering rigor and hands-on AI experience allows me to provide high-quality, analytical, and nuanced feedback for complex technical and linguistic projects. I am a native Turkish speaker with an upper-intermediate command of English.

Digital Electronics Design Intern at Roketsan (2025-05 – 2025-08)

Engineered an STM32F4-based measurement board and executed comprehensive hardware design with rigorous signal integrity and EMI/EMC best practices.

• Engineered an STM32F4-based measurement board in Altium Designer, integrating precision ADC voltage/current sensing alongside SPI/I²C and robust RS232/RS485 industrial communication interfaces.
• Executed comprehensive schematic capture and multi-layer PCB layout, applying rigorous signal integrity and EMI/EMC best practices for mixed-signal embedded hardware.
• Conducted component research, lifecycle analysis, and Bill of Materials (BOM) generation to meet stringent reliability requirements for defense-grade electronic systems.

Digital Design Intern at TÜBİTAK SAGE (2026-01 – 2026-05)

Designed and implemented a parameterized, multi-channel ARINC 429 IP Core in VHDL with DO-254 aviation standard compliance for Xilinx FPGAs.

• Designed and implemented a parameterized, multi-channel ARINC 429 IP Core in VHDL, featuring an AMBA APB v2.0 interface for embedded CPU communication targeting Xilinx FPGAs.
• Ensured strict DO-254 aviation standard compliance using Aldec ALINT-PRO, successfully resolving complex linting, feed-through, and asynchronous/synchronous reset architecture constraints (ADC/SDC).
• Developed a scalable architecture utilizing VHDL Generics to dynamically generate multiple TX/RX channels, integrating FIFO buffers and BRAM-based hardware mailboxes for efficient data routing.

High School Diploma – Jale Tezer Science High School (2022-06)

Undergraduate in English – TOBB Economy and Technology University (2022-08 – 2023-07)

Bachelor of Science in Electrical and Electronics Engineering – TOBB Economy and Technology University (2023-08)