Yan San

Machine Learning Engineer with a PhD in Computer Science and 5+ years of engineering experience building and shipping ML systems in Python and PyTorch. Built the on-device ML model powering Tsubura — a publicly released app for Japan's grape industry, covered by NHK, Yomiuri Shimbun, and Nikkei — demonstrating end-to-end ownership from data to shipped product. Proven ability to translate ML research into measurable business impact: 54% error reduction on hardest prediction cases, sub-second mobile inference, and farming efficiency gains reported by national press.

Seeking Software

Engineer, Machine Learning Engineer roles in Malaysia and Singapore.

Graduate Researcher (M.S. & Ph.D.) — Machine Learning & Computer Vision at University of Yamanashi (2021-01 – 2026-03)

• Built and shipped the on-device ML model for Tsubura — a publicly released smartphone app covered by NHK, Yomiuri Shimbun, and Nikkei upon launch (2024). Led end-to-end ML pipeline for Tsubura — designed data collection protocol, managed annotation (coordinating freelance annotators), led model training with postdoctoral collaboration, defined evaluation metrics aligned with published research standards, and independently executed on-device optimization for mobile inference.
• Translated research insight into business impact: lightweight counting model achieved MAE 2.60 at 0.33s/image on mobile — applied recursive feature elimination (RFE) to reduce from 19 to 8 features (58% reduction) while staying within 7.4% of full-feature accuracy. Demonstrates quality vs. efficiency tradeoff decision-making under real deployment constraints.
• Research directly impacted Yamanashi Prefecture's grape industry — farming adoption enabled 7x harvest efficiency with half the labor (NTV/TBS, 2024). Demonstrates ability to connect ML work to measurable real-world outcomes.
• 3D reconstruction pipeline improved OBB-IoU F1 from 35.6% → 88.5% (54% dense-bunch MAE reduction: 10.5 → 4.8) — combined COLMAP SfM, differentiable rendering, and 3D Gaussian primitives. Demonstrates building and shipping high-quality, iterative ML systems with rigorous evaluation.
• Built reproducible ML pipelines with clean experiment protocols and modular implementations — high code quality and maintainability across multi-year research programs.

R&D Engineer (FPGA/Digital Design) at ViE Technologies Sdn Bhd (2016-01 – 2021-01)

• 5 years production engineering — shipped features, maintained product quality through regression testing, and delivered customer-requested upgrades on schedule.
• Led FPGA development for next-generation product end-to-end: design through production release in cross-functional hardware/firmware teams. Demonstrates project ownership and crossfunctional delivery.

Ph.D. in Computer Science & Engineering – University of Yamanashi (2023/04 – 2026/03)

M.S. in Computer Science & Engineering – University of Yamanashi (2021/04 – 2023/03)

B.Eng. in Computer Engineering – University Malaysia Perlis (2012 – 2016)