Constraint Development - 6+ job offers

About the Role We are seeking a highly experienced STA Engineer to support full-chip timing closure for complex, high-performance SoCs. The role involves ownership of timing analysis, constraint development, and cross-functional collaboration across architecture, RTL, physical design, and IP teams.

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever

Your Team, Your Impact The Optical Digital Signal Processing (ODSP) PHY SW Team develops software for Marvell's DSP products used in pluggable optical modules-chips that form the backbone of the internet, moving data within and between data centers worldwide. Marvell is the market leader in dire

Marvell Technology

Your Team, Your Impact The Optical Digital Signal Processing (ODSP) PHY SW Team develops software for Marvell's DSP products used in pluggable optical modules-chips that form the backbone of the internet, moving data within and between data centers worldwide. Marvell is the market leader in dire

Wipro

$45,000 - $121,000 /year

Job description: Job Description Role Purpose Digital Design Engineering/RTL Design Services: ● Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library components ● Digital design, using System Verilog