Gilbert Kogo

Semiconductor Process Engineer in dry etch/FEOL with 6+ years of hands-on process engineering development of advanced-node module development experience at Intel, including DOE-driven process optimization, SPC/Cpk controls, HVM ramp readiness, tool/process matching, equipment troubleshooting, defect reduction, and cross-functional support across domestic and global fabs. PhD in Materials Science and Engineering with strong background in novel materials/performance research, and translating early-stage R&D into stable production processes. An innovative professional with a passion for advancing technology, bringing proven success multitasking tools and process improvement, define technology roadmaps to solve process and tool issues, and driving multiple projects to fulfillment to meet process capability and yield targets.

Dry Etch Module Development Engineer - Intel

• Led advanced-node semiconductor process module development for 7nm, 4nm, and 18A technologies, using DOE, SPC, Cpk, yield analysis, and process-window optimization to improve manufacturability, reduce variability, strengthen process controls, and support high-volume manufacturing ramp readiness.
• Collaborated with cross-functional engineering teams, vendors, and technical stakeholders to deliver new process capability, resolve manufacturing issues, improve product quality and reliability, and reduce production cost.
• Supported new process technology introduction from development through HVM ramp readiness by creating DOE plans, defining SPC/Cpk controls, developing process recipes/specifications, applying FDC methods, and validating tool/process matching within integrated process flows to improve stability, repeatability, and production readiness.
• Implemented functional technological flows while reducing costs and demonstrating compliance to Research & Development safety, quality and output to enhance process stability and product performance.
• Provided technical leadership and hands-on instruction to engineers across domestic and global Intel fabs on process start-up support, technology transfer, tool/process matching methodology, and HVM ramp readiness.
• Owned end-to-end process and semiconductor equipment escalations as module representative, partnering with engineers, vendors, and equipment suppliers to define failure modes, drive root-cause analysis, implement 8D/CAPA corrective actions, and improve reliability, defectivity, and availability across integrated manufacturing flows.
• Qualified new manufacturing semiconductor equipment for HVM ramp by troubleshooting process/equipment issues, validating tool/process matching, supporting inspection and testing controls, and driving continuous improvement to meet quality, timeline, and capacity goals for new product launches.
• Drove structured quality improvement and corrective actions that reduced structural defects by 90%, eliminated process-flow defects, improved recipe/process sequencing, and reduced tool clean rate by 90% to improve fab performance and process reliability.

Doctor of Philosophy - Materials Science and Engineering - Norfolk State University

Master of Science - Optical Sciences - University of Arizona

Master of Science - Optical Engineering - Norfolk State University

Bachelor of Science - Physics and Math - Xavier University of Louisiana