Jim Duong

PCB Design specialist with 7+ years of expertise in Schematic Capture, PCB design, RF circuit layouts, and design for manufacturability. Proven track record optimizing high-reliability electronics using Altium Designer, Cadence tools, Xpedition while ensuring compliance with IPC standards. Experienced in working with cross-functional engineering teams to translate complex RF requirements into manufacturable, production-ready designs.

Senior Electronic Engineer at RTX (2026-08 – 2026-10)

• Directed PCB layout and schematic design reviews for mission-critical RF systems, ensuring compliance with IPC-A-600 and IPC-2221 standards while mentoring junior engineers on design best practices and DFM principles.
• Architected high-frequency RF circuit boards using Altium Designer, optimizing trace routing and impedance matching to reduce EMI and achieve 99.2% first-pass manufacturing yield across aerospace platforms.
• Owned design for manufacturability (DFM) assessments and collaborated with manufacturing teams to translate engineering requirements into production-ready specifications, reducing fabrication lead time by 18 days.
• Implemented design rule checking (DRC) automation and electrical rule checking (ERC) workflows within Cadence tools, accelerating design validation cycles by 34% across multi-layer board layouts.

ECAD Electrical Engineer II at RTX (2021-11 – 2026-08)

• Designed and optimized RF printed circuit boards for defense avionics using Altium Designer, leveraging advanced routing techniques and layer stackup strategies to ensure signal integrity on high-speed analog and digital circuits.
• Executed schematic design and PCB layout for complex military-grade electronics, adhering strictly to IPC standards (IPC-2221, IPC-2152) and conducting rigorous design rule checking (DRC) to eliminate manufacturing defects; achieved zero rework on 12 production batches.
• Collaborated cross-functionally with systems engineers, manufacturing, and procurement to validate design for manufacturability constraints and component availability, reducing bill-of-materials conflicts by 47% and accelerating time-to-production.
• Mentored two junior electrical engineers on RF circuit design fundamentals, PCB layout best practices, and IPC compliance, fostering hands-on experience with Altium Designer and high-frequency design methodologies.

Electrical Engineer at Naval Undersea Warfare Center Division Keyport (2020-09 – 2021-11)

• Performed schematic design and validation for underwater acoustic detection systems, translating RF requirements into detailed electrical schematics and conducting comprehensive electrical rule checking (ERC) to ensure circuit integrity.
• Developed PCB layouts for sonar signal processing boards using Cadence tools, optimizing component placement and trace routing to minimize cross-talk and meet stringent design for manufacturability guidelines specific to marine-grade enclosures.
• Collaborated with hardware and manufacturing teams to ensure designs met IPC-A-600 acceptance criteria and production feasibility, reducing design iteration cycles from 6 weeks to 4 weeks through DFM reviews.

Hardware Intern at Panasonic Avionics Corporation (2018-07 – 2019-09)

• Assisted in PCB design and layout activities for in-flight entertainment systems, gaining hands-on experience with Altium Designer and learning board-level design principles for commercial aerospace applications.
• Supported schematic design documentation and review processes, contributing to multiple design iterations while learning IPC standards compliance and design for manufacturability concepts.
• Integrated RF circuits, selected appropriate components, and performed design validation, gaining practical experience in high-reliability electronics manufacturing.

Engineering Intern at Quantum Automation (2017-07 – 2018-07)

• Contributed to electronic control system design and prototyping, gaining exposure to PCB fundamentals and schematic documentation in industrial automation contexts.
• Participated in design reviews and learned basic design rule checking principles and manufacturing constraints relevant to electronics production.

Master of Science in Electrical and Electronics Engineering – California State Polytechnic University-Pomona (2017 – 2020)

Bachelor of Science in Computer Engineering – California State University-Fullerton (2012 – 2017)