Mani Sai Chilakala

Results-driven Mixed-Signal ASIC Design Verification Engineer and Embedded Systems Engineer with 2.5 years of experience in semiconductor verification, embedded software development, FPGA prototyping, hardware-software integration, and system validation across automotive, industrial, wireless communication, and consumer electronics domains. Experienced in developing UVM-based verification environments, verifying mixed-signal and digital ASICs, debugging complex silicon issues, and designing embedded firmware for real-time systems using C/C++, RTOS, and hardware communication protocols. Strong expertise in SystemVerilog, UVM, AMS verification, FPGA validation, scripting automation, and end-to-end product development with proven success improving verification coverage, reducing defects, and accelerating product release cycles.

Mixed-Signal ASIC Design Verification Engineer - Qualcomm - USA

(2025-07)

• Developed and maintained UVM-based verification environments for mixed-signal SoCs, validating ADC, DAC, PLL, power management, and high-speed interface IPs, achieving over 97% functional coverage while reducing pre-silicon defect escapes by 32%.
• Designed constrained-random testbenches, scoreboards, monitors, and protocol checkers using SystemVerilog and UVM, improving regression efficiency by 40% and accelerating verification closure across multiple ASIC programs.
• Performed mixed-signal verification using Verilog-AMS and analog behavioral models to validate analog-digital interactions, timing behavior, and power sequencing, contributing to successful first-pass silicon bring-up.
• Executed and analyzed large-scale regression suites with more than 12,000 simulation runs per release cycle using Cadence Xcelium and Synopsys VCS, identifying critical corner-case issues and reducing debug cycles by 25%.
• Developed SystemVerilog Assertions (SVA) and functional coverage models to verify protocol compliance, CDC behavior, reset sequences, and low-power functionality, increasing coverage effectiveness by 35%.
• Collaborated closely with design, architecture, analog, and physical design teams to review specifications, resolve functional gaps, and support verification planning, reducing verification-related design changes by 30%.
• Investigated simulation failures and silicon discrepancies using Verdi and SimVision, resolving more than 150 complex verification issues and improving overall design quality before tape-out.
• Automated regression execution, coverage collection, log analysis, and reporting through Python and Shell scripting, reducing manual verification effort by 45% and improving engineering productivity.

Embedded Systems Engineer - Honeywell - India

(2022-07 - 2023-12)

• Developed embedded firmware for industrial automation and control systems using Embedded C and C++, implementing real-time control, sensor monitoring, diagnostics, and communication features that improved system responsiveness by 30%.
• Designed and optimized low-level device drivers for SPI, I2C, UART, CAN, and Ethernet interfaces on ARM Cortex-based platforms, reducing communication failures by 35% and improving device reliability.
• Implemented multitasking applications using FreeRTOS, optimizing task scheduling, interrupt handling, and memory utilization, resulting in a 25% improvement in real-time system performance and stability.
• Collaborated with hardware teams during board bring-up, prototype validation, and hardware-software integration activities, supporting the successful release of 15+ embedded products with minimal integration issues.
• Developed firmware modules for industrial sensors and control units, incorporating fault detection and recovery mechanisms that reduced system downtime by 22% and improved operational reliability.
• Performed debugging and root cause analysis using oscilloscopes, logic analyzers, JTAG debuggers, and protocol analyzers, resolving over 120 critical hardware and firmware defects throughout development cycles.
• Created automated test frameworks and validation scripts using Python and Shell scripting, increasing test coverage by 40% while significantly reducing manual testing and verification effort.
• Worked on Embedded Linux-based platforms to develop communication modules, hardware abstraction layers, and device interfaces, enabling scalable and maintainable software architectures for next-generation industrial systems.

Master's - Electrical and Electronics Engineering - California State University, Sacramento (2024-01 - 2026-05)

Bachelor's - Electronics and Communication Engineering - Institute of Aeronautical Engineering (2020-10 - 2023-06)