Naveen Makarla

Responsible for Firmware development and testing technologies using Xilinx FPGA and Micro controller using tools such as FPGA RTL coding using VHDL, Vivado, Vitis.

Experience in Leading the team.

Experience in designing and use of Block Diagram, Simulation Test Bench, Embedded development kit, Software development kit, Chip scope for Design Validation in Xilinx IDE such as Vivado.

Associate Consultant - TCS - Hyderabad

(2026-08)

• Responsible for Firmware development and testing technologies using Xilinx FPGA and Micro controller using tools such as FPGA RTL coding using VHDL, Vivado, Vitis.
• Experience in Leading the team.
• Experience in designing and use of Block Diagram, Simulation Test Bench, Embedded development kit, Software development kit, Chip scope for Design Validation in Xilinx IDE such as Vivado.
• Experience in working with End-to-End task at the Client locations.

Senior Engineer - L & T PES - Bangalore

(2024-05 - 2026-07)

Payroll company: WEHARK Solutions, DataCore

• Responsible for Firmware development and testing technologies using Xilinx FPGA and Micro controller using tools such as FPGA RTL coding using VHDL, Vivado, Vitis.
• Experience in Leading the team.
• Experience in designing and use of Block Diagram, Simulation Test Bench, Embedded development kit, Software development kit, Chip scope for Design Validation in Xilinx IDE such as Vivado.
• Experience in working with End-to-End task at the Client locations.

Senior Member of Technical Staff - RTL Design - SmartSOC Solutions Pvt Ltd - Hyderabad

(2023-07 - 2024-04)

• Responsible for developing and testing technologies using Xilinx FPGA and Micro controller using tools such as Vivado, Vitis.
• Experience in working on the Latest Tool of Xilinx Versal architecture.
• Experience in working on multiple -FPGA's.
• Experience in designing and use of Block Diagram, Simulation Test Bench, Vitis in Xilinx IDE such as Vivado.

Senior Engineer - L & T Technology and Services - Hyderabad

(2022-07 - 2023-06)

• Responsible for developing and testing technologies using ASIC & FPGA controller using tools such Quatrus prime, Modelsim, SpyGlass.
• Experience in designing and use of Block Diagram, Simulation Test Bench and compiling using modelsim and Questasim tools.
• Experience in working on the Lint and CDC techniques.
• Lint and CDC checks using spyglass tools.

Consultant-B2 (Software Engineer Lead) - Capgemini - Pune

(2021-12 - 2022-07)

• Responsible for developing and testing 5G technologies using Xilinx FPGA and Micro controller using tools such as ISE, Vivado, EDK, SDK.
• Experience in designing and use of Block Diagram, Simulation Test Bench, Embedded development kit, Software development kit, Chip scope for Design Validation in Xilinx IDE such as Vivado.

Engineer - Astra Microwave Product Limited - Bangalore

(2017-05 - 2021-12)

• Developing and testing for Radar sub-modules using Xilinx FPGA and Micro controller using tools such as ISE, Vivado, EDK, SDK.
• Proficient in use of peripheral drivers/protocols such as I2C, SPI and UART
• Experience in designing and use of Block Diagram, Simulation Test Bench, Embedded development kit, Software development kit, Chip scope for Design Validation in Xilinx IDE such as Vivado and ISE.
• Actively took responsibilities to demonstrate RADAR sub-modules for Defence sectors.

B.Tech - ECE - Rajamahendri Institute of Engineering & Technology (2014)

+2 - MPC - Sri Chaitanya Junior Kalasala (2010)

SSC - Bhashyam Public School (2008)