Yasir Siddiqui

I am an analog mixed signal design engineer with more than 11 years of experience in analog circuit design

Microchip, Ottawa: 03/2023 to current

Working on low jitter LC-VCO design in 3nm

Also worked on a low jitter RO based SSPLL

SiTime, Delft: 04/2018 to 01/2023

Worked on MEMS oscillators, low noise LDOs, and low power SSPLL.

MS electronics (2014-2016) from KIET