21 microarchitecture opportunities in Noida updated today
job offers found
· Page 1 / 2What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analys
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analys
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in System C/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in System C/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses
What you'll do: - Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). - Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. - Perform comprehensive power, area, and performance trade-off anal
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in System C/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses
Are you ready to be a Siemens EDA ambassador and help shape the future of electronic design? Siemens EDA is a global technology leader in Electronic Design Automation (EDA) software. Our innovative tools empower companies worldwide to develop highly advanced electronic products faster and more cost-
What you'll do:- Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA).- Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals.- Perform comprehensive power, area, and performance trade-off analyse
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in System C/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
What you'll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area, and performance trade-off analyses t
NVIDIAWe are currently seeking an experienced Formal Verification Engineer with strong CPU/GPU and verification fundamentals to work in NVIDIA's Central Formal team based in Bangalore. NVIDIA builds CPUs and GPUs that powering up the next generation AI and HPC workloads. This position will have you crafti
₹5,40,000 – ₹8,60,000/year
Estimation confidence: Low
Estimate based on market data for Noida. Actual salaries may vary depending on experience, company, and area.
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