Abhinav K
VLSI -INTERN
Talent
CochinMember since October 7, 2026
Verilog HDLVHDLRTL DesignModelSimFunctional VerificationRTL SimulationDebuggingXilinx VivadoXilinx ISEAltium DesignerAutoCAD ElectricalEPLANXilinxSpartan-6
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Verilog HDLVHDLRTL DesignModelSimFunctional Verification
About
Electronics and Communication Engineer with a strong interest in Digital VLSI Design, RTL Design, FPGA Design, and Functional Verification. Familiar with Verilog HDL, VHDL, ModelSim, and Xilinx Vivado. Seeking a career in VLSI Design.
Experience
VLSI -INTERN - SMEClabs - Kochi, India
(2026-01 - 2026-08)
- Developed and simulated RTL designs using Verilog HDL and VHDL, performing functional verification, debugging, and validation with ModelSim and Vivado.
- Implemented and verified FPGA designs on Xilinx Spartan-6 boards, performing synthesis, hardware testing, and design validation for digital system.
TECHNICAL ENGINEER - Tech Synergy Technology Pvt. Ltd.
(2025-06 - 2026-01)
- Build and enhanced PLC programs, optimized HMI interfaces, created AutoCAD Electrical and Eplan drawings for control circuits, panel layouts, wiring diagrams, and I/O mapping.
- Carried out complete control panel wiring, panel assembly with system testing, debugging and troubleshooting.
Education
BACHELOR OF TECHNOLOGY - Electronics and Communication Engineering - Mar Athanasius College of Engineering, Kothamangalam
HIGHER SECONDARY SCHOOL – KERALA STATE BOARD - Govt HSS, Othukkungal
Skills
VLSI -INTERN
