Mahesh Phand
Applications Engineer — FPGA — Embedded Systems — EDA — Verification
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About
Electronics and Telecommunication Engineering student with hands-on experience in FPGA, embedded systems, digital design, hardware-software integration, testing, debugging, and engineering validation. Experienced in analysing technical issues, reproducing failures, documenting root causes, and collaborating with development teams through industrial QA experience at Comau. Strong foundation in digital electronics, FPGA development, verification concepts, C/C++, Python, and engineering problem solving.
Currently developing practical skills in RTL design, Verilog, EDA workflows, synthesis, timing analysis, Tcl scripting, and semiconductor design flows with a focus on Applications Engineering.
Experience
QA Engineer Intern - Comau India Pvt. Ltd.
(2026-06-15)
- Perform functional, regression, and UI validation of industrial automation software and engineering workflows.
- Reproduce technical issues, analyse failures, identify root causes, and document defects using Jira.
- Analyse application behaviour against functional requirements and support developers during issue investigation and resolution.
- Collaborate with development and engineering teams to drive defects through verification, retesting, and closure.
- Apply structured debugging, test-case design, regression methodology, and technical documentation in an Agile engineering environment.
Education
Bachelor of Engineering - Electronics & Telecommunication Engineering
