Md Abid Ali

M.Tech VLSI Design candidate (GPA: 9.13/10) at VIT with hands-on, project-based experience across the digital ASIC design flow — RTL design, floor planning, placement & CTS, routing, static timing analysis (STA), and physical verification (DRC/LVS). Proficient in Verilog HDL, Cadence Virtuoso, and TCL scripting, with a strong foundation in CMOS logic, digital VLSI design, and the RTL-to-GDSII flow. IEEE-published researcher (VLSI Design & Embedded Systems Conference 2025).

Brings 2.5+ years of industry experience in process design and systematic debugging. Seeking an Engineer (Hardware) role to apply strong analytical and problem-solving skills to SoC and ASIC development.

Programmer Analyst - Cognizant Technology Solutions - Kolkata

(2021-09 - 2024-05)

• Built and optimized ETL workflows using Informatica PowerCenter for large-scale enterprise data integration, developing strong skills in process flow design, debugging, and systematic problem-solving — directly transferable to RTL debug and verification workflows.
• Managed enterprise servers and maintained data quality and reliability across high-volume processing pipelines — experience that translates directly to disciplined, detail-oriented engineering execution.

M.Tech - VLSI Design - Vellore Institute of Technology (2024 - 2026)

B.Tech - Electronics & Communication Engineering - Asansol Engineering College, MAKAUT (2017 - 2021)