Pramod
Graduate VLSI Design & Verification Engineer | RTL Design | SystemVerilog | UVM
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About
Graduate Electronics and Communication Engineer with focused training in VLSI Design and Verification, including RTL development, SystemVerilog-based verification, and UVM methodology. Hands-on experience in designing, verifying, and synthesizing digital IPs with strong interest in semiconductor design, functional verification, and system-level validation. Seeking entry-level technical roles in VLSI Design and Verification where strong debugging skills and verification rigor can contribute to high-quality silicon development.
Experience
Advanced VLSI Design & Verification Trainee - Maven Silicon Pvt. Ltd.
- Bangalore
- Trained in RTL design flow, verification planning, and UVM-based testbench development
- Hands-on experience with assertions, coverage-driven verification, and debugging techniques
- Exposure to industry-standard VLSI design and verification practices
Education
Bachelor of Technology - Electronics & Communication Engineering - SRK Institute of Technology (2019 - 2023)
Intermediate - MPC - Sri Chaitanya Junior College
Secondary School Certificate - SSC - Subodaya High School
