Sakeel Ahamed
VLSI / RTL DESIGN ENGINEER | VERILOG HDL | DIGITAL DESIGN
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About
Electronics and Communication Engineering graduate specializing in VLSI, RTL design, and digital IC design, with hands-on experience in Verilog HDL, FSM-based control, synchronous digital design, functional verification, waveform analysis, and Cadence Virtuoso. Designed and verified a 2x2 matrix-multiplication AI accelerator using MAC units, a PE array, FIFO, SRAM, ALU, register file, and FSM controller. Industry exposure includes electronic testing, Burning Test, FCT testing, hardware troubleshooting, and quality-control support at Syrma SGS Technology Limited.
Experience
Testing Engineer - Syrma SGS Technology Limited
- Performed Burning Tests to evaluate electronic product performance and reliability under continuous operation.
- Conducted FCT (Functional Circuit Test) to verify functionality and electrical performance of electronic assemblies.
- Identified test failures and supported hardware troubleshooting and quality-control activities.
VLSI Intern - Kaashiv Infotech
- Gained practical exposure to VLSI design, Verilog HDL, and digital electronics.
- Built working knowledge of RTL design, FSMs, combinational/sequential circuits, simulation, and waveform analysis.
Education
B.E. - Electronics and Communication Engineering - SRM-TRP College of Engineering, Trichy Campus (2022-11 - 2026-05)
